Analog signal processing circuits are often desired in electronic systems where transmission and reception of signals can have very specific system requirements. Often times, signals are encoded, encrypted, modulated, phase-shaped, or otherwise manipulated for transmission in the system. The various signal manipulations can be performed to improve signal reception as well as to prevent unauthorized reception. The resulting signal may be transmitted to a receiving circuit, where the receiving circuit must understand how to extract the signal from the transmission.
The various described signal manipulations in the electronic system can be performed by analog function blocks or digital function blocks. Example analog function blocks include buffers, amplifiers, filters, level shifters, demodulators and integrators, to name a few. Example digital signal processing blocks include such functions as: decrypting, decoding, demodulating, filtering, scaling, to name a few. Depending on the desired signal processing functions, the selected analog function blocks can vary significantly such that custom-built circuits are necessary. In contrast, digital signal processing functions can be provided by a general-purpose processor, such as a CPU or a DSP core, where the processor is arranged to provide the various signal processing functions using algorithmic processing that can be changed with software. It is often preferable to translate the analog signals into the digital domain such that digital signal processing can be utilized.
An analog-to-digital converter (ADC) is a circuit that performs the translation between analog and digital signals. An example of a conventional ADC circuit (900) is illustrated in FIG. 9. ADC circuit 900 includes a resistor reference ladder and a comparator array. The resistor reference ladder is arranged to divide an analog reference voltage (VREF) into a number of different reference voltages (VREF1–VREFN). Each of the comparators (CP1–CPN) in the comparator array is arranged to compare the analog input signal (VIN) to a respective one of the reference voltages (VREF1–VREFN). Each of the comparators (CP1–CPN) has a respective output (OUT1–OUTN) which indicates whether or not the analog input signal (VIN) is greater than its respective reference voltage. The various comparator outputs (OUT1–OUTN) provide a thermometer decode that indicates a value associated with the magnitude of the analog input signal (VIN).
Another example of a conventional ADC circuit (1000) is illustrated in FIG. 10. ADC circuit 1000 includes a level shifting resistor ladder, a comparator array, a buffer, and a current source. The buffer is arranged to provide a buffered version of the analog input signal (VIN) as signal VIN1. The current source is arranged to provide a current (ILS) coupled to the output of the buffer through the level shifting resistor ladder such that tap points in the level shifting resistor ladder each correspond to a DC level shifted version of the buffered input signal (VIN1). In other words, VIN2=VIN1+LS1, VIN3=VIN2+LS2, and VINN=VIN(N−1)+LSN−1. Each of the comparators (CP1–CPN) is arranged to compare a respective one of the analog input signals (VIN1–VINN) to the reference voltage (VREF) to provide a respective one of the outputs (OUT1–OUTN). The various comparator outputs (OUT1–OUTN) again provide a thermometer decode that indicates a value associated with the magnitude of the analog input signal (VIN).
Yet another example of a conventional ADC circuit (1100) is illustrated in FIG. 11. ADC circuit 1100 includes a resistor reference ladder, an array of sampling capacitors (CS1–CSN), a first array of switches (S11–SN1), a second array of switches (S12–SN2), an array of a comparator array (CP1–CPN), and an array of inverting amplifiers (I1–IN). The resistor reference ladder is substantially identical to that described previously with respect to FIG. 9. The switches and capacitors are arranged to sample the difference between a respective one of the reference voltages (VREF1 through VREFN) and the analog input signal (VIN), while the inverting amplifier circuit is arranged to amplify the difference for input to a respective one of the comparators (CP1–CPN). For example, capacitor CS1 is arranged to sample the difference between VIN and VREF1, while capacitor CS2 is arranged to sample the difference between VIN and VREF2, etc. Each of the comparators is arranged to compare the sampled difference voltage to a signal ground to provide a respective output (OUT1–OUTN). The various comparator outputs (OUT1–OUTN) again provide a thermometer decode that indicates a value associated with the magnitude of the analog input signal (VIN).